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IEICE Trans

Fujio MASUOKA

Decananometer Surrounding Gate Transistor (SGT) Scalability by Using an Intrinsically-Doped Body and Gate Work Function Engineering
Yasue YAMAMOTO Takeshi HIDAKA Hiroki NAKAMURA Hiroshi SAKURABA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/04/01
Vol. E89-C  No. 4  pp. 560-567
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
Surrounding Gate Transistor (SGT), scaling, intrinsic channel, gate work function engineering, 
 Summary | Full Text:PDF
An Analysis of Program and Erase Mechanisms for Floating Channel Type Surrounding Gate Transistor Flash Memory Cells
Masakazu HIOKI Hiroshi SAKURABA Tetsuo ENDOH Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/09/01
Vol. E87-C  No. 9  pp. 1628-1635
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
Flash memory, Surrounding Gate Transistor (SGT), floating body, program and erase operation, 
 Summary | Full Text:PDF
A High Performance Voltage Down Converter (VDC) Using New Flexible Control Technology of Driving Current
Tetsuo ENDOH Kazutoshi NAKAMURA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/12/25
Vol. E81-C  No. 12  pp. 1905-1912
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
down voltage converter, driving current, power consumption, response, 
 Summary | Full Text:PDF
The Analysis of the Stacked-Surrounding Gate Transistor (S-SGT) DRAM for the High Speed and Low Voltage Operation
Tetsuo ENDOH Katsuhisa SHINMEI Hiroshi SAKURABA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/25
Vol. E81-C  No. 9  pp. 1491-1498
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
SGT, S-SGT, DRAM, bit-line capacitance, 
 Summary | Full Text:PDF
Evaluation of the Voltage Down Converter (VDC) with Low Ratio of Consuming Current to Load Current in DC/AC Operation Mode
Tetsuo ENDOH Kazutoshi NAKAMURA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/06/25
Vol. E81-C  No. 6  pp. 968-974
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
voltage down converter, stability, response, low-power consumption, 
 Summary | Full Text:PDF
New Reduction Mechanism of the Stress Leakage Current Based on the Deactivation of Step Tunneling Sites for Thin Oxide Films
Tetsuo ENDOH Kazuyosi SHIMIZU Hirohisa IIZUKA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/10/25
Vol. E80-C  No. 10  pp. 1310-1316
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
thin oxide films, stress leakage current, flash memory, step tonneling, 
 Summary | Full Text:PDF
New Write/Erase Operation Technology for Flash EEPROM Cells to lmprove the Read Disturb Characteristics
Tetsuo ENDOH Hirohisa IIZUKA Riichirou SHIROTA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/10/25
Vol. E80-C  No. 10  pp. 1317-1323
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
flash memory, read disturb characteristics, write/erase operation, stress leakage current, 
 Summary | Full Text:PDF
An Accurate Model of Fully-Depleted Surrounding Gate Transistor (FD-SGT)
Tetsuo ENDOH Tairiku NAKAMURA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7  pp. 905-910
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Novel Structure Devices
Keyword: 
SGT, FD-SGT, current-voltage characteristics, threshold voltage, 
 Summary | Full Text:PDF
FOREWORD
Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7  pp. 839-840
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF
An Analytic Steady-State Current-Voltage Characteristics of Short Channel Fully-Depleted Surrounding Gate Transistor (FD-SGT)
Tetsuo ENDOH Tairiku NAKAMURA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/07/25
Vol. E80-C  No. 7  pp. 911-917
Type of Manuscript:  Special Section PAPER (Special Issue on New Concept Device and Novel Architecture LSIs)
Category: Novel Structure Devices
Keyword: 
SGT, FD-SGT, current-voltage characteristics, threshold voltage, short channel effect, 
 Summary | Full Text:PDF
A Novel Programming Method Using a Reverse Polarity Pulse in Flash EEPROMs
Hirohisa IIZUKA Tetsuo ENDOH Seiichi ARITOME Riichiro SHIROTA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/06/25
Vol. E79-C  No. 6  pp. 832-835
Type of Manuscript:  Special Section PAPER (Special Issue on ULSI Memory Technology)
Category: Nonvolatile memories
Keyword: 
flash EEPROM, oxide leakage current, hole trap, reverse polarity pulse, read disturb, 
 Summary | Full Text:PDF
New α-Particle Induced Soft Error Mechanism in a Three Dimensional Capacitor Cell
Yukihito OOWAKI Keiji MABUCHI Shigeyoshi WATANABE Kazunori OHUCHI Jun'ichi MATSUNAGA Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/07/25
Vol. E78-C  No. 7  pp. 845-851
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memory Device, Circuit, Architecture and Application Technologies for Multimedia Age)
Category: 
Keyword: 
α-particle, soft error, DRAM, 
 Summary | Full Text:PDF
Sub-Halfmicron Flash Memory Technologies
Koji SAKUI Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1251-1259
Type of Manuscript:  INVITED PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: Non-volatile Memory
Keyword: 
magnetic memory, core memory, EEPROM, flash memory, NAND EEPROM, 
 Summary | Full Text:PDF
FOREWORD
Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1249-1250
Type of Manuscript:  FOREWORD
Category: 
Keyword: 
 Summary | Full Text:PDF
Data Retention Characteristics of Flash Memory Cells after Write and Erase Cycling
Seiichi ARITOME Riichiro SHIROTA Koji SAKUI Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8  pp. 1287-1295
Type of Manuscript:  Special Section PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: Non-volatile Memory
Keyword: 
flash EEPROM, data retention, endurance, tunnel oxide, electron traps, 
 Summary | Full Text:PDF
A Study of High-Performance NAND Structured EEPROMS
Tetsuo ENDOH Riichiro SHIROTA Seiichi ARITOME Fujio MASUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1992/11/25
Vol. E75-C  No. 11  pp. 1351-1357
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: 
Keyword: 
flash EEPROM, NAND EEPROM endurance, block technology, page program technology, 
 Summary | Full Text:PDF
Reviews and Prospects of Non-Volatile Semiconductor Memories
Fujio MASUOKA Riichiro SHIROTA Koji SAKUI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1991/04/25
Vol. E74-C  No. 4  pp. 868-874
Type of Manuscript:  INVITED PAPER (Special Issue on LSI Memories)
Category: ROM
Keyword: 
 Summary | Full Text:PDF