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Standard Cell Structure and Diffusion Reordering for Block Area Reduction in Double Diffusion Break FinFET Process Shinichi NISHIZAWA Shinji KIMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2025/06/01
Vol. E108-A
No. 6 ;
pp. 798-805
Type of Manuscript:
PAPER
Category: VLSI Design Technology and CAD Keyword: standard cell, FinFET, double diffusion break, | | | Summary | Full Text:PDF | |
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Source/Drain Optimization of Double Gate FinFET Considering GIDL for Low Standby Power Devices Katsuhiko TANAKA Kiyoshi TAKEUCHI Masami HANE | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C
No. 4 ;
pp. 842-847
Type of Manuscript:
Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Device Keyword: FinFET, double gate, GIDL, device simulation, LSTP, | | | Summary | Full Text:PDF | |
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