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| Keyword : asynchronous circuits
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A Design Method for Designing Asynchronous Circuits on Commercial FPGAs Using Placement Constraints
Tatsuki OTAKE Hiroshi SAITO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/12/01
Vol. E103-A
No. 12 ;
pp. 1427-1436
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
asynchronous circuits, FPGAs, placement constraints, floorplan, | | | Summary | Full Text:PDF | |
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Conversion from Synchronous RTL Models to Asynchronous RTL Models
Shogo SEMBA Hiroshi SAITO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/07/01
Vol. E102-A
No. 7 ;
pp. 904-913
Type of Manuscript:
Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category:
Keyword:
asynchronous circuits, RTL design, conversion, XML, | | | Summary | Full Text:PDF | |
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Integration of Behavioral Synthesis and Floorplanning for Asynchronous Circuits with Bundled-Data Implementation
Naohiro HAMADA Hiroshi SAITO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C
No. 4 ;
pp. 506-515
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
asynchronous circuits, behavioral synthesis, floorplanning, | | | Summary | Full Text:PDF | |
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High-Level Test Generation for Asynchronous Circuits from Signal Transition Graph
Eunjung OH Soo-Hyun KIM Dong-Ik LEE Ho-Yong CHOI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/12/01
Vol. E85-A
No. 12 ;
pp. 2674-2683
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test Generation
Keyword:
asynchronous circuits, ATPG, STG, | | | Summary | Full Text:PDF | |
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