Keyword : communication link


Long-Range Asynchronous On-Chip Link Based on Multiple-Valued Single-Track Signaling
Naoya ONIZAWA Atsushi MATSUMOTO Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/06/01
Vol. E95-A  No. 6 ; pp. 1018-1029
Type of Manuscript:  PAPER
Category: Circuit Theory
Keyword: 
delay-insensitiveasynchronous circuitsmultiple-valued current-mode (MVCM) circuitsNetwork-on-Chip (NoC)communication link
 Summary | Full Text:PDF

Highly Reliable Multiple-Valued One-Phase Signalling for an Asynchronous On-Chip Communication Link
Naoya ONIZAWA Takahiro HANYU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8 ; pp. 2089-2099
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Multiple-Valued VLSI Technology
Keyword: 
delay-insensitiveasynchronous circuitsmultiple-valued current-mode (MVCM) circuitsNetwork-on-Chip (NoC)communication link
 Summary | Full Text:PDF

A Systematic Design of Fault Tolerant Systolic Arrays Based on Triple Modular Redundancy in Time-Processor Space
Mineo KANEKO Hiroyuki MIYAUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/12/25
Vol. E79-D  No. 12 ; pp. 1676-1689
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
VLSI array processorsystolic arrayfault tolerancecommunication linkdependence graph
 Summary | Full Text:PDF