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| Keyword : yield
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A Tuning Method of Programmable Delay Element with an Ordered Finite Set of Delays for Yield Improvement
Hayato MASHIKO Yukihide KOHIRA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A
No. 12 ;
pp. 2443-2450
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword:
delay variation, timing violation, yield, programmable delay element, | | | Summary | Full Text:PDF | |
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Hypersphere Sampling for Accelerating High-Dimension and Low-Failure Probability Circuit-Yield Analysis
Shiho HAGIWARA Takanori DATE Kazuya MASU Takashi SATO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2014/04/01
Vol. E97-C
No. 4 ;
pp. 280-288
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design,---,Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
design for manufacturing, Monte Carlo method, importance sampling, SRAM, process variation, yield, norm minimization, Gaussian mixture models, clustering, hypersphere sampling, | | | Summary | Full Text:PDF | |
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An Efficient Test and Repair Flow for Yield Enhancement of One-Time-Programming NROM-Based ROMs
Tsu-Lin LI Masaki HASHIZUME Shyue-Kung LU | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/09/01
Vol. E96-D
No. 9 ;
pp. 2026-2030
Type of Manuscript:
Special Section LETTER (Special Section on Dependable Computing)
Category:
Keyword:
NROM, data inversion, fault masking, yield, | | | Summary | Full Text:PDF | |
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A High Performance Current Latch Sense Amplifier with Vertical MOSFET
Hyoungjun NA Tetsuo ENDOH | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2013/05/01
Vol. E96-C
No. 5 ;
pp. 655-662
Type of Manuscript:
Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category:
Keyword:
current latch sense amplifier, vertical MOSFET, SRAM, sensing time, speed, current, voltage gain, stability, yield, circuit area, | | | Summary | Full Text:PDF | |
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48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations