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IEICE Trans

Keyword : double gate

Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory
Doo-Hyun KIM Il Han PARK Seongjae CHO Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5 ; pp. 659-663
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
SONOS, flash memory, nitride-based charge trap memory, retention, multi-bit, double gate, 
 Summary | Full Text:PDF
Source/Drain Optimization of Double Gate FinFET Considering GIDL for Low Standby Power Devices
Katsuhiko TANAKA Kiyoshi TAKEUCHI Masami HANE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C  No. 4 ; pp. 842-847
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Device
Keyword: 
FinFET, double gate, GIDL, device simulation, LSTP, 
 Summary | Full Text:PDF