Il Han PARK


Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory
Doo-Hyun KIM Il Han PARK Seongjae CHO Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5  pp. 659-663
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
SONOSflash memorynitride-based charge trap memoryretentionmulti-bitdouble gate
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3-Dimensional Terraced NAND (3D TNAND) Flash Memory-Stacked Version of Folded NAND Array
Yoon KIM Seongjae CHO Gil Sung LEE Il Han PARK Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5  pp. 653-658
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
NANDflash memorystacked NANDvertical channel
 Summary | Full Text:PDF

Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)
Seongjae CHO Il Han PARK Jung Hoon LEE Jang-Gn YUN Doo-Hyun KIM Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/05/01
Vol. E91-C  No. 5  pp. 731-735
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
memory arrayelectrical interference3-D memory deviceread operationPCI (paired cell interference)
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Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme
Jang Gn YUN Il Han PARK Seongjae CHO Jung Hoon LEE Doo-Hyun KIM Gil Sung LEE Yoon KIM Jong Duk LEE Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/05/01
Vol. E91-C  No. 5  pp. 742-746
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
2-bit recessed channel memorylifted-charge trapping node (L-CTN) schemeshort channel effect (SCE)second bit effect (SBE)bottom-side effect (BSE)VTH window
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Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices
Seongjae CHO Jang-Gn YUN Il Han PARK Jung Hoon LEE Jong Pil KIM Jong-Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/05/01
Vol. E90-C  No. 5  pp. 988-993
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Novel MOSFET Structures
Keyword: 
3-D devicesvertical ion implantationdoping profileconcentration peakdoping gradient
 Summary | Full Text:PDF