Doo-Hyun KIM


A New 1T DRAM Cell: Cone Type 1T DRAM Cell
Gil Sung LEE Doo-Hyun KIM Seongjae CHO Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5  pp. 681-685
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
1T DRAMconeelectric field concentration
 Summary | Full Text:PDF

Simulation of Retention Characteristics in Double-Gate Structure Multi-Bit SONOS Flash Memory
Doo-Hyun KIM Il Han PARK Seongjae CHO Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/05/01
Vol. E92-C  No. 5  pp. 659-663
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
SONOSflash memorynitride-based charge trap memoryretentionmulti-bitdouble gate
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Establishing Read Operation Bias Schemes for 3-D Pillar Structure Flash Memory Devices to Overcome Paired Cell Interference (PCI)
Seongjae CHO Il Han PARK Jung Hoon LEE Jang-Gn YUN Doo-Hyun KIM Jong Duk LEE Hyungcheol SHIN Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/05/01
Vol. E91-C  No. 5  pp. 731-735
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
memory arrayelectrical interference3-D memory deviceread operationPCI (paired cell interference)
 Summary | Full Text:PDF

Characterization of 2-bit Recessed Channel Memory with Lifted-Charge Trapping Node (L-CTN) Scheme
Jang Gn YUN Il Han PARK Seongjae CHO Jung Hoon LEE Doo-Hyun KIM Gil Sung LEE Yoon KIM Jong Duk LEE Byung-Gook PARK 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/05/01
Vol. E91-C  No. 5  pp. 742-746
Type of Manuscript:  Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: 
Keyword: 
2-bit recessed channel memorylifted-charge trapping node (L-CTN) schemeshort channel effect (SCE)second bit effect (SBE)bottom-side effect (BSE)VTH window
 Summary | Full Text:PDF