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FOREWORD
Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2025/07/01
Vol. E108-C
No. 7
pp. 358-358
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FOREWORD
Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2024/07/01
Vol. E107-C
No. 7
pp. 190-190
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FOREWORD
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Template Attacks on ECDSA Hardware and Theoretical Estimation of the Success Rate
Kotaro ABE Makoto IKEDA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2024/03/01
Vol. E107-A
No. 3
pp. 575-582
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Design Technology and CAD
Keyword:
side-channel attacks, ECDSA, template attacks, hardware security, | | | Summary | Full Text:PDF | |
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2022/06/01
Vol. E105-C
No. 6
pp. 207-208
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2021/06/01
Vol. E104-C
No. 6
pp. 213-214
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2020/03/01
Vol. E103-C
No. 3
pp. 66-67
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Authenticated-Encrypted Analog-to-Digital Conversion Based on Non-Linearity and Redundancy Transformation
Vinod V. GADDE Makoto IKEDA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/12/01
Vol. E102-A
No. 12
pp. 1731-1740
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
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ADC, side channel attacks, information security, encryption, authentication, | | | Summary | Full Text:PDF | |
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2017/03/01
Vol. E100-C
No. 3
pp. 221-222
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FOREWORD
Makoto IKEDA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A
No. 12
pp. 2301-2301
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Montgomery Multiplier Design for ECDSA Signature Generation Processor
Masato TAMURA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A
No. 12
pp. 2444-2452
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
ECDSA, pipelined Montgomery multiplier, optimization, | | | Summary | Full Text:PDF | |
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C
No. 8
pp. 899-900
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FOREWORD
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FOREWORD
Fumio ARAKAWA Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2015/07/01
Vol. E98-C
No. 7
pp. 534-535
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All-Digital Wireless Transceiver with Sub-Sampling Demodulation and Burst-Error Correction
Sanad BUSHNAQ Makoto IKEDA Kunihiro ASADA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/12/01
Vol. E95-A
No. 12
pp. 2234-2241
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Circuit Design
Keyword:
all-digital, sub-sampling, error correction, | | | Summary | Full Text:PDF | |
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3-D Range Map Acquisition System Based on CMOS Image Sensor Using Time-Multiplexing Structured Pattern
Hiroki YABE Makoto IKEDA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2012/04/01
Vol. E95-C
No. 4
pp. 635-642
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design – Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
structured light, CMOS image sensor, | | | Summary | Full Text:PDF | |
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A Proposal of High Speed and Low Power Data Transmission Method for VLSIs by Reduced-Swing Signal
Makoto IKEDA Kunihiro ASADA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A
No. 10
pp. 1666-1675
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
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