Hiroaki YAMAOKA


A Performance Driven Module Generator for a Dual-Rail PLA with Embedded 2-Input Logic Cells
Ulkuhan EKINCIEL Hiroaki YAMAOKA Hiroaki YOSHIDA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/06/01
Vol. E88-D  No. 6  pp. 1159-1167
Type of Manuscript:  PAPER
Category: Computer Components
Keyword: 
PLAmodule generatorcell generationHDL behavior generation
 Summary | Full Text:PDF

A High-Speed and Area-Efficient Dual-Rail PLA Using Divided and Interdigitated Column Circuits
Hiroaki YAMAOKA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6  pp. 1069-1077
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
PLAhigh-speedarea-efficientdual-rail
 Summary | Full Text:PDF

A Logic-Cell-Embedded PLA (LCPLA): An Area-Efficient Dual-Rail Array Logic Architecture
Hiroaki YAMAOKA Hiroaki YOSHIDA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/02/01
Vol. E87-C  No. 2  pp. 238-245
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
PLAlogic celldual-railarray logicarea-efficient
 Summary | Full Text:PDF

A High-Speed PLA Using Dynamic Array Logic Circuits with Latch Sense Amplifiers
Hiroaki YAMAOKA Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2001/09/01
Vol. E84-C  No. 9  pp. 1240-1246
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
high speedPLAarray logic circuitsense amplifier
 Summary | Full Text:PDF