Keyword : ECDSA


Low Latency 256-bit $mathbb{F}_p$ ECDSA Signature Generation Crypto Processor
Shotaro SUGIYAMA Hiromitsu AWANO Makoto IKEDA 
Publication:   
Publication Date: 2018/12/01
Vol. E101-A  No. 12 ; pp. 2290-2296
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
ECDSAV2X communicationHardware securityASICscalar multiplication
 Summary | Full Text:PDF

Montgomery Multiplier Design for ECDSA Signature Generation Processor
Masato TAMURA Makoto IKEDA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12 ; pp. 2444-2452
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
ECDSApipelined Montgomery multiplieroptimization
 Summary | Full Text:PDF