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Vol.E76-C No.5
pp.818-823
Special SectionPAPER
A 6-ns 1-Mb CMOS SRAM with Latched Sense Amplifier
Teruo SEKI, Eisaku ITOH, Chiaki FURUKAWA, Isamu MAENO, Tadashi OZAWA, Hiroyuki SANO, Noriyuki SUZUKI, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.824-829
Special SectionPAPER
Design Techniques for High-Throughput BiCMOS Self-Timed SRAM's
Koichi YOKOMIZO, Kuniyoshi NAITO, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.830-838
Special SectionPAPER
A 500-Megabyte/s Data-Rate 4.5M DRAM
Natsuki KUSHIYAMA, Shigeo OHSHIMA, Don STARK, Hiroyuki NOJI, Kiyofumi SAKURAI, Satoru TAKASE, Tohru FURUYAMA, Richard M. BARTH, Andy CHAN, John DILLON, James A. GASBARRO, Matthew M. GRIFFIN, Mark HOROWITZ, Thomas H. LEE, Victor LEE, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.839-843
Special SectionPAPER
Variable VCC Design Techniques for Battery-Operated DRAM's
Seung-Moon YOO, Ejaz HAQ, Seung-Hoon LEE, Yun-Ho CHOI, Soo-IN CHO, Nam-Soo KANG, Daeje CHIN, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.844-849
Special SectionPAPER
Low-Power On-Chip Supply Voltage Conversion Scheme for Ultrahigh-Density DRAM's
Daisaburo TAKASHIMA, Shigeyoshi WATANABE, Tsuneaki FUSE, Kazumasa SUNOUCHI, Takahiko HARA, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.850-852
Special SectionLETTER
Low-Power 1/2 Frequency Dividers Using 0.1-µm CMOS Circuits Built with Ultrathin SIMOX Substrates
M. FUJISHIMA, K. ASADA, Y. OMURA, K. IZUMI, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.853-857
Special SectionLETTER
A 1-GHz/0.9-mW CMOS/SIMOX Divide-by-128/129 Dual-Modulus Prescaler Using a Divide-by-2/3 Synchronous Counter
Yuichi KADO, Masao SUZUKI, Keiichi KOIKE, Yasuhisa OMURA, Katsutoshi IZUMI, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.858-862
Special SectionLETTER
A Si Bipolar 1.4-GHz Time Space Switch LSI for B-ISDN
Osamu MATSUDA, Shin-ichiro HAYANO, Takao TAKEUCHI, Hideki KITAHATA, Hisashi TAKEMURA, Tsutomu TASHIRO, |
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Summary | Full Text:PDF | |
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Vol.E76-C No.5
pp.863-867
Special SectionLETTER
A Current-Controlled Latch Sense Amplifier and a Static Power-Saving Input Buffer for Low-Power Architecture
Tsuguo KOBAYASHI, Kazutaka NOGAMI, Tsukasa SHIROTORI, Yukihiro FUJIMOTO, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.5
pp.525-526
FOREWORD
FOREWORD
Tatsuo HIGUCHI, |
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Summary | Full Text:PDF | |
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