IEICE Trans

Warning: Undefined array key "lang" in /var/www/02search_html/bin/search_result.php on line 70

Warning: Undefined array key "input_data" in /var/www/02search_html/bin/search_result.php on line 199

Warning: Undefined array key "Begin_V" in /var/www/02search_html/bin/search_result.php on line 249
IEICE Trans

Search of Paper Information
Search Results
Total 44044 documents match your query.	Current List: 40211 - 40220

Vol.E76-D No.7 pp.832-836 Special SectionLETTER Improved Forward Test Generation of Sequential Circuits Using Variable-Length Time Frames Yuzo TAKAMATSU, Taijiro OGAWA, Hiroshi TAKAHASHI,
	Summary \| Full Text:PDF

Vol.E76-D No.7 pp.837-841 Special SectionLETTER A Practical Functional Test Using Flowchart for Production Testing of Microprocessor Based Sequence Controllers Masaki HASHIZUME, Takeomi TAMESADA, Eiji TASAKA, Toshihiro KAYAHARA, Tomohisa YAMAZOE,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.847-847 FOREWORD FOREWORD Shin'ichi OISHI,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.848-857 Special SectionPAPER Nonlinear Circuits and Neural Nets Synthesis of Linard's Equations Having More than One Periodic Solution Tosiro KOGA, Masaharu SHINAGAWA, Satoshi HASAKO,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.858-866 Special SectionPAPER Nonlinear Circuits and Neural Nets Necessary and Sufficient Conditions for the Basic Equation of Nonlinear Resistive Circuits Containing Ideal Diodes to Have a Unique Solution Tetsuo NISHI, Yuji KAWANE,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.867-872 Special SectionPAPER Nonlinear Circuits and Neural Nets Behavior of Solutions Related to an Accuracy Exp(-1/ε) Makoto ITOH,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.873-877 Special SectionPAPER Nonlinear Circuits and Neural Nets Learning of a Multi-Valued Neural Network and Its Application Ryuzo TAKIYAMA, Koichiro KUBO,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.878-885 Special SectionPAPER Nonlinear Circuits and Neural Nets Boltzmann Machine Processor Using Single-Bit Operation Mamoru SASAKI, Shuichi KANEDA, Fumio UENO, Takahiro INOUE, Yoshiki KITAMURA,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.886-893 Special SectionPAPER Algorithms for VLSI Design A Recycling Scheme for Layout Patterns Used in an Old Fabrication Technology Yuji SHIGEHIRO, Isao SHIRAKAWA,
	Summary \| Full Text:PDF

Vol.E76-A No.6 pp.894-903 Special SectionPAPER Algorithms for VLSI Design Placement, Routing, and Compaction Algorithms for Analog Circuits Imbaby I. MAHMOUD, Toru AWASHIMA, Koji ASAKURA, Tatsuo OHTSUKI,
	Summary \| Full Text:PDF

Current List: 40211 - 40220

go to Page Top

Search Results