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Vol.E76-D No.7
pp.755-762
Special SectionPAPER
A Concurrent Fault Detection Method for Instruction Level Parallel Processors
Alberto PALACIOS PAWLOVSKY, Makoto HANAWA, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.763-770
Special SectionPAPER
An Application of Regular Temporal Logic to Verification of Fail-Safeness of a Comparator for Redundant System
Kazuo KAWAKUBO, Hiromi HIRAISHI, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.771-775
Special SectionPAPER
An Efficient Fault Simulation Method for Reconvergent Fan-Out Stem
Sang Seol LEE, Kyu Ho PARK, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.776-790
Special SectionPAPER
REDUCT: A Redundant Fault Identification Algorithm Using Circuit Reduction Techniques
Miyako TANDAI, Takao SHINSHA, Takao NISHIDA, Kaoru MORIWAKI, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.791-799
Special SectionPAPER
Minimum Test Set for Locally Exhaustive Testing of Multiple Output Combinational Circuits
Hiroyuki MICHINISHI, Tokumi YOKOHIRA, Takuji OKAMOTO, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.800-808
Special SectionPAPER
Two-Pattern Test Capabilities of Autonomous TGP Circuits
Kiyoshi FURUYA, Edward J. McCLUSKEY, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.809-816
Special SectionPAPER
Generalized Marching Test for Detecting Pattern Sensitive Faults in RAMs
Masahiro HASHIMOTO, Eiji FUJIWARA, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.817-825
Special SectionPAPER
Efficient Methods for Guided-Probe Diagnosis
WEN Xiaoqing, Noriyoshi ITAZAKI, Kozo KINOSHITA, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.826-831
Special SectionPAPER
SIFLAP-G: A Method of Diagnosing Gate-Level Faults in Combinational Circuits
Koji YAMAZAKI, Teruhiko YAMADA, |
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Summary | Full Text:PDF | |
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Vol.E76-D No.7
pp.832-836
Special SectionLETTER
Improved Forward Test Generation of Sequential Circuits Using Variable-Length Time Frames
Yuzo TAKAMATSU, Taijiro OGAWA, Hiroshi TAKAHASHI, |
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Summary | Full Text:PDF | |
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