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Vol.E80-A No.3
pp.487-493 Special SectionPAPER
Inverter Reduction Algorithm for Super Fine-Grain Parallel Processing Hideyuki ITO, Kouichi NAGAMI, Tsunemichi SHIOZAWA, Kiyoshi OGURI, Yukihiro NAKAMURA, |
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Vol.E80-A No.3
pp.494-505 Special SectionPAPER
A Circuit Partitioning Algorithm with Path Delay Constraints for Multi-FPGA Systems Nozomu TOGAWA, Masao SATO, Tatsuo OHTSUKI, |
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Vol.E80-A No.3
pp.506-513 Special SectionPAPER
A New Rip-Up and Reroute Algorithm for Very Large Scale Gate Arrays Hiroshi SHIROTA, Satoshi SHIBATANI, Masayuki TERAI, |
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Vol.E80-A No.3
pp.514-520 Special SectionPAPER
Application of Full Scan Design to Embedded Memory Arrays Seiken YANO, Katsutoshi AKAGI, Hiroki INOHARA, Nagisa ISHIURA, |
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Vol.E80-A No.3
pp.521-533 Special SectionPAPER
Necessary and Sufficient Condition for Liveness of Asymmetric Choice Petri Nets Tadashi MATSUMOTO, Yasuhiko TSURUTA, |
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Vol.E80-A No.3
pp.534-543 Special SectionPAPER
A Linear-Time Algorithm for Determining the Order of Moving Products in Realloction Problems Hiroyoshi MIWA, Hiro ITO, |
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Vol.E80-A No.3
pp.544-550 Special SectionPAPER
On a Generalization of a Covering Problem Called Single Cover on Undirected Flow Networks Hiroshi TAMURA, Hidehito SUGAWARA, Masakazu SENGOKU, Shoji SHINODA, |
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Vol.E80-A No.3
pp.551-556 Special SectionPAPER
A Genetic Approach for Maximum Independent Set Problems Akio SAKAMOTO, Xingzhao LIU, Takashi SHIMAMOTO, |
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Vol.E80-A No.3
pp.557-563 Special SectionPAPER
Single Machine Scheduling to Minimize the Maximum Lateness with Both Specific and Generalized Due Dates Keisuke TANAKA, Milan VLACH, |
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Vol.E80-A No.3
pp.564-566 Special SectionLETTER
An Optimal Block Terminal Assignment Algorithm for VLSI Data Path Allocation Shoichiro YAMADA, |
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Current List: 36641 - 36650
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