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Vol.E80-B No.4
pp.632-638
LETTER
Radio Communication
Trellis-Coded OFDM Signal Detection with Maximal Ratio Combining and Combined Equalization and Trellis Decoding
SeongSik LEE, Jeong Woo JWA, HwangSoo LEE, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.513-514
FOREWORD
FOREWORD
Akira MATSUZAWA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.515-524
INVITED PAPER
Analog LSI
Radio-Frequency Silicon LSI's for Personal Communications
Masayuki ISHIKAWA, Tsuneo TSUKAHARA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.525-536
INVITED PAPER
Analog LSI
Analog LSI Circuit Design Issues for Optical Transmission Systems
Yukio AKAZAWA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.537-543
Special SectionPAPER
Wide Dynamic Range MOS Analog Inverter
Kawori TAKAKUBO, Hajime TAKAKUBO, Shigetaka TAKAGI, Nobuo FUJII, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.544-549
Special SectionPAPER
Compact Realization of Phase-Locked Loop Using Digital Control
Masanori IZUMIKAWA, Masakazu YAMASHINA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.550-556
INVITED PAPER
Memory LSI
Hierarchical Word-Line Architecture for Large Capacity DRAMs
Tatsunori MUROTANI, Tadahiko SUGIBAYASHI, Masahide TAKADA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.557-565
Special SectionPAPER
A 167-MHz 1-Mbit CMOS Synchronous Cache SRAM
Hideharu YAHATA, Yoji NISHIO, Kunihiro KOMIYAJI, Hiroshi TOYOSHIMA, Atsushi HIRAISHI, Yoshitaka KINOSHITA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.566-572
Special SectionPAPER
A 5.8 ns 256 kb SRAM with 0.4 µm Super-CMOS Process Technology
Kunihiko KOZARU, Atsushi KINOSHITA, Tomohisa WADA, Yutaka ARITA, Michihiro YAMADA, |
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Summary | Full Text:PDF | |
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Vol.E80-C No.4
pp.573-581
Special SectionPAPER
Folded Bitline Architecture for a Gigabit-Scale NAND DRAM
Shinichiro SHIRATAKE, Daisaburo TAKASHIMA, Takehiro HASEGAWA, Hiroaki NAKANO, Yukihito OOWAKI, Shigeyoshi WATANABE, Takashi OHSAWA, Kazunori OHUCHI, |
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Summary | Full Text:PDF | |
| Current List: 36601 - 36610
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