Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2018/12/01 Vol. E101-ANo. 12pp. 2262-2270 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: weighted fault coverage, critical area, critical area analysis, bridge fault, open fault,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/12/01 Vol. E93-ANo. 12pp. 2463-2471 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: memory BIST, BISR, embedded SRAM, area per good die, iterative improvement algorithm,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/01/01 Vol. E93-DNo. 1pp. 17-23 Type of Manuscript: Special Section PAPER (Special Section on Test, Diagnosis and Verification of SOCs) Category: Keyword: test compression, hybrid compression, volume diagnosis, ATPG, partial good chip,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/03/01 Vol. E91-DNo. 3pp. 706-712 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSIs) Category: Test Compression Keyword: convolutional compactor, test response compaction, X-masking, galois field,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/03/01 Vol. E91-DNo. 3pp. 726-735 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSIs) Category: Test Compression Keyword: test data compression, test response compaction, BIST-aided scan test, X-value, ATPG,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/03/01 Vol. E91-DNo. 3pp. 720-725 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSIs) Category: Test Compression Keyword: test data reduction, Illinois scan, bit flipping, BIST-aided scan test,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2006/09/01 Vol. E89-ANo. 9pp. 2386-2395 Type of Manuscript: PAPER Category: Reliability, Maintainability and Safety Analysis Keyword: reliability, distributed systems, hybrid state saving Time Warp simulation, evaluation model,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/03/01 Vol. E87-DNo. 3pp. 586-591 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Scan Testing Keyword: hybrid BIST, n-detection test, partially rotational scan, low-speed tester,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2003/12/01 Vol. E86-ANo. 12pp. 3063-3071 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Timing Verification and Test Generation Keyword: BIST, LFSR, test-per-clock, test-per-scan, seed, polynomial,
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2003/10/01 Vol. E86-BNo. 10pp. 2940-2947 Type of Manuscript: Special Section PAPER (IEICE/IEEE Joint Special Issue on Assurance Systems and Networks) Category: Network Systems and Applications Keyword: video conference system, convolutional codes, H.323, Xcast, packet loss,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1998/01/25 Vol. E81-DNo. 1pp. 144-147 Type of Manuscript: LETTER Category: Artificial Intelligence and Cognitive Science Keyword: exemplar-based learning, voting, feature partitioning,