|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
FiC-RNN: A Multi-FPGA Acceleration Framework for Deep Recurrent Neural Networks
Yuxi SUN Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2020/12/01
Vol. E103-D
No. 12
pp. 2457-2462
Type of Manuscript:
Special Section PAPER (Special Section on Parallel, Distributed, and Reconfigurable Computing, and Networking)
Category: Computer System
Keyword:
multi-FPGA, recurrent neural networks, LSTM, | | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
FOREWORD
Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/08/01
Vol. E96-D
No. 8
pp. 1581-1581
Type of Manuscript:
FOREWORD
Category:
Keyword:
| | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
FOREWORD
Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/12/01
Vol. E95-D
No. 12
pp. 2749-2749
Type of Manuscript:
FOREWORD
Category:
Keyword:
| | | Summary | Full Text:PDF | |
|
|
|
|
FOREWORD
Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D
No. 2
pp. 293-293
Type of Manuscript:
FOREWORD
Category:
Keyword:
| | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
A Survey on Dynamically Reconfigurable Processors
Hideharu AMANO | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 2006/12/01
Vol. E89-B
No. 12
pp. 3179-3187
Type of Manuscript:
INVITED PAPER (Special Section on Software Defined Radio Technology and Its Applications)
Category:
Keyword:
dynamically reconfigurable processors, | | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Performance Evaluation of Instruction Set Architecture of MBP-Light in JUMP-1
Noriaki SUZUKI Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2003/10/01
Vol. E86-D
No. 10
pp. 1996-2005
Type of Manuscript:
Special Section PAPER (Special Issue on Development of Advanced Computer Systems)
Category:
Keyword:
CC-NUMA, DSM management, instruction set architecture, | | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
The MDX (Multi-Dimensional X'bar): A Class of Networks for Large Scale Multiprocessors
Atsushi MURATA Taisuke BOKU Hideharu AMANO | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1996/08/25
Vol. E79-D
No. 8
pp. 1116-1123
Type of Manuscript:
Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Interconnection Networks
Keyword:
interconnection network, crossbar, MIN, multiprocessors, | | | Summary | Full Text:PDF | |
|
|
|
|
|
|
|
The Compatible Acknowledging Ethernet
Toshitada SAITO Mario TOKORO Hideharu AMANO | Publication: IEICE TRANSACTIONS (1976-1990)
Publication Date: 1987/10/25
Vol. E70-E
No. 10
pp. 960-967
Type of Manuscript:
PAPER
Category: Switching and Communication Processing
Keyword:
| | | Summary | Full Text:PDF | |
|
|
|
|