Keyword : body bias

Optimization of Body Biasing for Variable Pipelined Coarse-Grained Reconfigurable Architectures
Takuya KOJIMA Naoki ANDO Hayate OKUHARA Ng. Anh Vu DOAN Hideharu AMANO 
Publication:   
Publication Date: 2018/06/01
Vol. E101-D  No. 6 ; pp. 1532-1540
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
CGRA, body bias, power reduction, Cool Mega Array, 
 Summary | Full Text:PDF
Analysis of Body Bias Control Using Overhead Conditions for Real Time Systems: A Practical Approach
Carlos Cesar CORTES TORRES Hayate OKUHARA Nobuyuki YAMASAKI Hideharu AMANO 
Publication:   
Publication Date: 2018/04/01
Vol. E101-D  No. 4 ; pp. 1116-1125
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
silicon-on-insulator, SOTB, body bias, low power design, time-overhead, energy-overhead, 
 Summary | Full Text:PDF
Energy-Efficient Standard Cell Memory with Optimized Body-Bias Separation in Silicon-on-Thin-BOX (SOTB)
Yusuke YOSHIDA Kimiyoshi USAMI 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12 ; pp. 2785-2796
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
standard cell memory, silicon-on-thin-box (SOTB), energy-efficient, ultra-low voltage, body bias, 
 Summary | Full Text:PDF
Body Bias Domain Partitioning Size Exploration for a Coarse Grained Reconfigurable Accelerator
Yusuke MATSUSHITA Hayate OKUHARA Koichiro MASUYAMA Yu FUJITA Ryuta KAWANO Hideharu AMANO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-D  No. 12 ; pp. 2828-2836
Type of Manuscript:  Special Section PAPER (Special Section on Parallel and Distributed Computing and Networking)
Category: Architecture
Keyword: 
CGRA, body bias, power reduction, cool mega array, 
 Summary | Full Text:PDF
E-Band 65nm CMOS Low-Noise Amplifier Design Using Gain-Boost Technique
Kosuke KATAYAMA Mizuki MOTOYOSHI Kyoya TAKANO Chen Yang LI Shuhei AMAKAWA Minoru FUJISHIMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/06/01
Vol. E97-C  No. 6 ; pp. 476-485
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
body bias, coupled resonator, device modeling, E-band communication, millimeter wave, optimizer, 
 Summary | Full Text:PDF
A Novel Body Bias Selection Scheme for Leakage Minimization
Dong-Su LEE Sung-Chan KANG Young-Hyun JUN Bai-Sun KONG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/09/01
Vol. E94-C  No. 9 ; pp. 1490-1493
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
body bias, leakage current, subthreshold leakage, junction leakage, leakage monitoring, 
 Summary | Full Text:PDF
Difficulty of Power Supply Voltage Scaling in Large Scale Subthreshold Logic Circuits
Tadashi YASUFUKU Taro NIIYAMA Zhe PIAO Koichi ISHIDA Masami MURAKATA Makoto TAKAMIYA Takayasu SAKURAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3 ; pp. 332-339
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
minimum operating voltage, subthreshold, logic, variations, body bias, 
 Summary | Full Text:PDF
Low-Voltage Process-Compensated VCO with On-Chip Process Monitoring and Body-Biasing Circuit Techniques
Ken UENO Tetsuya HIROSE Tetsuya ASAI Yoshihito AMEMIYA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/12/01
Vol. E92-A  No. 12 ; pp. 3079-3081
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: Device and Circuit Modeling and Analysis
Keyword: 
voltage-controlled oscillator, process variation, process compensation, body bias, current reference, 
 Summary | Full Text:PDF
An Experimental Study on Body-Biasing Layout Style Focusing on Area Efficiency and Speed Controllability
Koichi HAMAMOTO Hiroshi FUKETA Masanori HASHIMOTO Yukio MITSUYAMA Takao ONOYE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/02/01
Vol. E92-C  No. 2 ; pp. 281-285
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
body bias, layout, 
 Summary | Full Text:PDF
Optimization of the Body Bias Voltage Set (BBVS) for Flex Power FPGA
Takashi KAWANAMI Masakazu HIOKI Yohei MATSUMOTO Toshiyuki TSUTSUMI Tadashi NAKAGAWA Toshihiro SEKIGAWA Hanpei KOIKE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/12/01
Vol. E90-D  No. 12 ; pp. 1947-1955
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Reconfigurable Device and Design Tools
Keyword: 
FPGA, low-power, threshold voltage control, body bias, 
 Summary | Full Text:PDF
Ultra-Low Voltage Analog Integrated Circuits
Shouri CHATTERJEE Yannis TSIVIDIS Peter KINGET 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/06/01
Vol. E89-C  No. 6 ; pp. 673-680
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuit and Device Technologies)
Category: 
Keyword: 
low voltage, 0.5 V, body bias, nano-scale circuits, 
 Summary | Full Text:PDF