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Vol.E82-A No.11
pp.2455-2464
Special SectionPAPER
A Partially Explicit Method for Efficient Symbolic Checking of Language Containment
Kiyoharu HAMAGUCHI, Michiyo ICHIHARA, Toshinobu KASHIWABARA, |
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Vol.E82-A No.11
pp.2465-2474
Special SectionPAPER
A Technique for Modelling Dynamic Reconfiguration with Improved Simulation Accuracy
Milan VASILKO, David CABANIS, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2475-2484
Special SectionPAPER
Fast Instruction Cache Simulation for Hardware/Software Co-Design
Marcello LAJOLO, Luciano LAVAGNO, Alberto SANGIOVANNI-VINCENTELLI, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2485-2491
Special SectionPAPER
A Proposition on Floating Gate Neuron MOS Macromodeling for Device Fabrications
Tadahiro OCHIAI, Hiroshi HATANO, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2492-2498
Special SectionPAPER
RSPICE: A Fast and Robust Timing Simulator for Digital MOS VLSI
Xia CAI, Huazhong YANG, Yaowei JIA, Hui WANG, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2499-2504
Special SectionPAPER
A VLSI Scan-Chain Optimization Algorithm for Multiple Scan-Paths
Susumu KOBAYASHI, Masato EDAHIRO, Mikio KUBO, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2505-2513
Special SectionPAPER
Digital-Controlled Analog Circuits for Weighted-Sum Operations: Architecture, Implementation and Applications
Jie CHEN, Guoliang SHOU, Changming ZHOU, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2514-2520
Special SectionPAPER
A High-Speed, Low-Power Phase Frequency Detector and Charge-Pump Circuits for High Frequency Phase-Locked Loops
Won-Hyo LEE, Sung-Dae LEE, Jun-Dong CHO, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2521-2526
Special SectionPAPER
A New Single-Clock Flip-Flop for Half-Swing Clocking
Young-Su KWON, In-Cheol PARK, Chong-Min KYUNG, |
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Summary | Full Text:PDF | |
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Vol.E82-A No.11
pp.2527-2529
Special SectionLETTER
Parallel Test Structure in Latch Based Asynchronous Pipeline
Jing-ling YANG, Chiu-sing CHOY, Cheong-Fat CHAN, |
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Summary | Full Text:PDF | |
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Current List: 33831 - 33840
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