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Network Clock System that Ensures a High Level of Frequency Accuracy
Shuichi FUJIKAWA | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 2015/11/01
Vol. E98-B
No. 11 ;
pp. 2212-2226
Type of Manuscript:
PAPER
Category: Transmission Systems and Transmission Equipment for Communications
Keyword:
clock, synchronization, evaluation, algorithm, MTIE, GPS, | | | Summary | Full Text:PDF | |
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Efficient Routing of Board-Level Optical Clocks for Ultra High-Speed Systems
Chung-Seok (Andy) SEO Abhijit CHATTERJEE | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/06/01
Vol. E87-A
No. 6 ;
pp. 1310-1317
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003))
Category:
Keyword:
clock, optical waveguide, interconnect, physical design, optimization, | | | Summary | Full Text:PDF | |
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A 0.25 µm CMOS/SIMOX PLL Clock Generator Embedded in a Gate Array LSI with a Locking Range of 5 to 500 MHz
Hiroki SUTOH Kimihiro YAMAKOSHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 1999/07/25
Vol. E82-C
No. 7 ;
pp. 1334-1340
Type of Manuscript:
PAPER
Category: Integrated Electronics
Keyword:
PLL, CMOS/SIMOX, VCO, clock, jitter, skew, lock range, | | | Summary | Full Text:PDF | |
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