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| Keyword : FPGAs
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A Design Method for Designing Asynchronous Circuits on Commercial FPGAs Using Placement Constraints
Tatsuki OTAKE Hiroshi SAITO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2020/12/01
Vol. E103-A
No. 12 ;
pp. 1427-1436
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category:
Keyword:
asynchronous circuits, FPGAs, placement constraints, floorplan, | | | Summary | Full Text:PDF | |
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Reduction of the Number of FPGA Blocks by Maximizing Flexibility of Internal Functions
Takenori KOUDA Shigeru YAMASHITA Yahiko KAMBAYASHI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1998/12/25
Vol. E81-A
No. 12 ;
pp. 2554-2562
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword:
logic optimization, FPGAs, SPFDs, PSPFDs, | | | Summary | Full Text:PDF | |
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