Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A
No. 11 ;
pp. 2632-2638
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: IP Protection
Keyword:
core partitioning, embedded core testing, intellectual property, partially-mergeable cores, test access mechanism (TAM), |