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| Takayasu SAKURAI
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A Self-Alignment Row-by-Row Variable-VDD Scheme Reducing 90% of Active-Leakage Power in SRAM's
Fayez Robert SALIBA Hiroshi KAWAGUCHI Takayasu SAKURAI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2007/04/01
Vol. E90-C
No. 4
pp. 743-748
Type of Manuscript:
Special Section PAPER (Special Section on Low-Power, High-Speed LSIs and Related Technologies)
Category: Memory
Keyword:
active leakage, low power, SRAM, | | | Summary | Full Text:PDF | |
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Perspectives of Low-Power VLSI's
Takayasu SAKURAI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C
No. 4
pp. 429-436
Type of Manuscript:
INVITED PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category:
Keyword:
digital, memory, application, low power, VLSI, leakage, | | | Summary | Full Text:PDF | |
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50 µm Pads on Board Wireless Connector Based on Track-and-Charge Scheme Allowing Contacted Signaling