Kazutaka NOGAMI


A 110-MHz/1-Mb Synchronous TagRAM
Yasuo UNEKAWA Tsuguo KOBAYASHI Tsukasa SHIROTORI Yukihiro FUJIMOTO Takayoshi SHIMAZAWA Kazutaka NOGAMI Takehiko NAKAO Kazuhiro SAWADA Masataka MATSUI Takayasu SAKURAI Man Kit TANG William A. HUFFMAN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/05/25
Vol. E77-C  No. 5  pp. 733-740
Type of Manuscript:  Special Section PAPER (Special Section on the 1993 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.29, No.4 April 1994))
Category: 
Keyword: 
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A Current-Controlled Latch Sense Amplifier and a Static Power-Saving Input Buffer for Low-Power Architecture
Tsuguo KOBAYASHI Kazutaka NOGAMI Tsukasa SHIROTORI Yukihiro FUJIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/05/25
Vol. E76-C  No. 5  pp. 863-867
Type of Manuscript:  Special Section LETTER (Special Section on the 1992 VLSI Circuits Symposium (Joint Issue with the IEEE Journal of Solid-State Circuits, Vol.28, No.4 April 1993))
Category: 
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A 5 ns 369 kbit Port-Configurable Embedded SRAM with 0.5 µm CMOS Gate Array
Kazuhiro SAWADA Toshinari TAKAYANAGI Kazutaka NOGAMI Makoto TAKAHASHI Masanori UCHIDA Yukiko ITOH Tetsuya IIZUKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1991/04/25
Vol. E74-C  No. 4  pp. 929-937
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: ASIC
Keyword: 
 Summary | Full Text:PDF