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IEICE Trans

Pil-Ho LEE

A 3Gbps/Lane MIPI D-PHY Transmission Buffer Chip
Pil-Ho LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2019/06/01
Vol. E102-A  No. 6  pp. 783-787
Type of Manuscript:  Special Section LETTER (Special Section on Circuits and Systems)
Category: 
Keyword: 
transmission buffer chip, LVDS, SLVS, MIPI D-PHY, FPGA-based frame generator, 
 Summary | Full Text:PDF
A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display
Ho-Seong KIM Pil-Ho LEE Jin-Wook HAN Seung-Hun SHIN Seung-Wuk BAEK Doo-Ill PARK Yongkyu SEO Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2017/11/01
Vol. E100-C  No. 11  pp. 1035-1038
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
transmitter bridge chip, MIPI D-PHY, DSI, FPGA-based frame generator, phase-locked loop, 
 Summary | Full Text:PDF
A 10-bit 20-MS/s Asynchronous SAR ADC with Meta-Stability Detector Using Replica Comparators
Sang-Min PARK Yeon-Ho JEONG Yu-Jeong HWANG Pil-Ho LEE Yeong-Woong KIM Jisu SON Han-Yeol LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6  pp. 651-654
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
asynchronous successive approximation register, analog-to-digital converter, meta-stability detector, replica comparator, 
 Summary | Full Text:PDF
An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis
Pil-Ho LEE Yu-Jeong HWANG Han-Yeol LEE Hyun-Bae LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/04/01
Vol. E99-C  No. 4  pp. 440-443
Type of Manuscript:  BRIEF PAPER
Category: 
Keyword: 
on-chip monitoring circuit, chip-to-chip interface, analog-to-digital converter, phase-locked loop-based frequency synthesizer, sub-sampling, 
 Summary | Full Text:PDF
A 125MHz 64-Phase Delay-Locked Loop with Coarse-Locking Circuit Independent of Duty Cycle
Pil-Ho LEE Hyun Bae LEE Young-Chan JANG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2014/05/01
Vol. E97-C  No. 5  pp. 463-467
Type of Manuscript:  BRIEF PAPER
Category: Integrated Electronics
Keyword: 
multi-phase DLL, harmonic lock, coarse-locking circuit, initial phase detector, duty cycle, 
 Summary | Full Text:PDF