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| Jun FURUTA
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A Low-Power Radiation-Hardened Flip-Flop with Stacked Transistors in a 65 nm FDSOI Process
Haruki MARUOKA Masashi HIFUMI Jun FURUTA Kazutoshi KOBAYASHI | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2018/04/01
Vol. E101-C
No. 4
pp. 273-280
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
single event effect, soft error, α particle, neutron, heavy ion, FDSOI, flip-flop, low-power consumption, | | | Summary | Full Text:PDF | |
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An Area/Delay Efficient Dual-Modular Flip-Flop with Higher SEU/SET Immunity
Jun FURUTA Kazutoshi KOBAYASHI Hidetoshi ONODERA | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C
No. 3
pp. 340-346
Type of Manuscript:
Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category:
Keyword:
TMR, built-in soft error, SEU, SET, | | | Summary | Full Text:PDF | |
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