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IEICE Trans

Hyo-Sig WON

A Low-Power Edge-Triggered and Logic-Embedded Flip-Flop Using Complementary Pass Transistor Circuit
Ki-Tae PARK Tomokatsu MIZUKUSA Hyo-Sig WON Hiroyuki KURINO Mitsumasa KOYANAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 640-644
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
low-power, flip-flop, logic-embedded, edge-triggered, 
 Summary | Full Text:PDF
A Power-Down Circuit Scheme Using Data-Preserving Complementary Pass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI
Ki-Tae PARK Tomokatsu MIZUKUSA Hyo-Sig WON Kyu-Myung CHOI Jeong-Taek KONG Hiroyuki KURINO Mitsumasa KOYANAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 645-648
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
low-power, MTCMOS, data-preserving, complementary pass transistor, power-down circuit scheme, 
 Summary | Full Text:PDF