Jeong-Taek KONG

A Power-Down Circuit Scheme Using Data-Preserving Complementary Pass Transistor Flip-Flop for Low-Power High-Performance Multi-Threshold CMOS LSI
Ki-Tae PARK Tomokatsu MIZUKUSA Hyo-Sig WON Kyu-Myung CHOI Jeong-Taek KONG Hiroyuki KURINO Mitsumasa KOYANAGI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 645-648
Type of Manuscript:  LETTER
Category: Electronic Circuits
low-powerMTCMOSdata-preservingcomplementary pass transistorpower-down circuit scheme
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Interconnect Modeling in Deep-Submicron Design
Won-Young JUNG Soo-Young OH Jeong-Taek KONG Keun-Ho LEE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2000/08/25
Vol. E83-C  No. 8  pp. 1311-1316
Type of Manuscript:  INVITED PAPER (Special Issue on 1999 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD'99))
Category: Circuit Applications
statistical interconnect library generationinterconnect modelingMonte Carlo methodprocess variation
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