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Total 44163 documents match your query. Current List: 37421 - 37430

Vol.E79-C No.7  pp.881-882
FOREWORD  
FOREWORD
Atsushi IWATA, Ian YOUNG, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.883-891
Special SectionPAPER  Communications
A 2.5-Gb/s 15-mW Clock Recovery Circuit
Behzad RAZAVI, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.892-897
Special SectionPAPER  Communications
46 Gb/s DEMUX, 50 Gb/s MUX, and 30 GHz Static Frequency Divider in Silicon Bipolar Technology
Alfred FELDER, Michael MOLLER, Josef POPP, Josef BOCK, Hans-Martin REIN, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.898-904
Special SectionPAPER  Logic
A 250-622 MHz Deskew and Jitter-Suppressed Clock Buffer Using Two-Loop Architecture
Satoru TANOI, Tetsuya TANABE, Kazuhiko TAKAHASHI, Sanpei MIYAMOTO, Masaru UESUGI, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.905-914
Special SectionPAPER  Logic
An 80-MOPS-Peak High-Speed and Low-Power-Consumption 16-b Digital Signal Processor
Hideyuki KABUO, Minoru OKAMOTO, Isao TANAKA, Hiroyuki YASOSHIMA, Shinichi MARUI, Masayuki YAMASAKI, Toshio SUGIMURA, Katsuhiko UEDA, Toshihiro ISHIKAWA, Hidetoshi SUZUKI, Ryuichi ASAHI, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.915-924
Special SectionPAPER  Logic
A 286 MHz 64-b Floating Point Multiplier with Enhanced CG Operation
Hiroshi MAKINO, Hiroaki SUZUKI, Hiroyuki MORINAKA, Yasunobu NAKASE, Koichiro MASHIKO, Tadashi SUMI, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.925-933
Special SectionPAPER  Logic
An Efficient Charge Recovery Logic Circuit
Yong MOON, Deog-kyoon JEONG, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.934-941
Special SectionPAPER  Interface Circuits
A Low Power and High Speed Data Transfer Scheme with Asynchronous Compressed Pulse Width Modulation for AS-Memory
Tadaaki YAMAUCHI, Yoshikazu MOROOKA, Hideyuki OZAKI, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.942-947
Special SectionPAPER  Interface Circuits
Capacitance Coupling Immune, Transient Sensitive Accelerator for Resistive Interconnect Signals of Subquarter Micron ULSI
Tomofumi IIMA, Masayuki MIZUNO, Tadahiko HORIUCHI, Masakazu YAMASHINA, 
Summary | Full Text:PDF

Vol.E79-C No.7  pp.948-956
Special SectionPAPER  Memory
A 90-MHz 16-Mb System Integrated Memory with Direct Interface to CPU
Katsumi DOSAKA, Akira YAMAZAKI, Naoya WATANABE, Hideaki ABE, Jun OHTANI, Toshiyuki OGAWA, Kazunori ISHIHARA, Masaki KUMANOYA, 
Summary | Full Text:PDF

Current List: 37421 - 37430
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