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Vol.E83-A No.12
pp.2558-2568
Special SectionPAPER
Performance Optimization
A Performance Optimization Method by Gate Resizing Based on Statistical Static Timing Analysis
Masanori HASHIMOTO, Hidetoshi ONODERA, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2569-2576
Special SectionPAPER
Layout Synthesis
An Iterative Improvement Circuit Partitioning Algorithm under Path Delay Constraints
Jun'ichiro MINAMI, Tetsushi KOIDE, Shin'ichi WAKABAYASHI, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2577-2583
Special SectionPAPER
Layout Synthesis
A Cell Synthesis Method for Salicide Process Using Assignment Graph
Kazuhisa OKADA, Takayuki YAMANOUCHI, Takashi KAMBE, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2584-2591
Special SectionPAPER
Layout Synthesis
WSSA: A High Performance Simulated Annealing and Its Application to Transistor Placement
Shunji SAIKA, Masahiro FUKUI, Masahiko TOYONAGA, Toshiro AKINO, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2592-2599
Special SectionPAPER
Simulation
A Method for Linking Process-Level Variability to System Performances
Tomohiro FUJITA, Hidetoshi ONODERA, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2600-2607
Special SectionPAPER
Test
Multi-Cycle Path Detection Based on Propositional Satisfiability with CNF Simplification Using Adaptive Variable Insertion
Kazuhiro NAKAMURA, Shinji MARUOKA, Shinji KIMURA, Katsumasa WATANABE, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2608-2615
Special SectionPAPER
Test
Testability Analysis of Analog Circuits via Determinant Decision Diagrams
Tao PI, Chuan-Jin Richard SHI, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2616-2622
Special SectionPAPER
Analog Circuit Design
High-Speed Wide-Locking Range VCO with Frequency Calibration
Takeo YASUDA, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2623-2626
Special SectionLETTER
Analog Circuit Design
A 3.3 V CMOS PLL with a Self-Feedback VCO
Yeon Kug MOON, Kwang Sub YOON, |
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Summary | Full Text:PDF | |
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Vol.E83-A No.12
pp.2627-2630
Special SectionLETTER
Analog Circuit Design
Design of a Low Power Consumption Pulse-Shaping 1:4 Interpolation FIR Filter for W-CDMA Applications
Keun-Jang RYOO, Jong-Wha CHONG, |
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Summary | Full Text:PDF | |
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Current List: 32481 - 32490
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