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Total 44213 documents match your query. Current List: 32461 - 32470

Vol.E83-A No.12  pp.2399-2399
FOREWORD  
FOREWORD
Yukihiro NAKAMURA, Takashi KAMBE, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2400-2408
Special SectionPAPER  VLSI Architecture
Architecture and Performance Evaluation of a New Functional Memory: Functional Memory for Addition
Kazutoshi KOBAYASHI, Masanao YAMAOKA, Yukifumi KOBAYASHI, Hidetoshi ONODERA, Keikichi TAMARU, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2409-2416
Special SectionPAPER  VLSI Architecture
Programmable Dataflow Computing on PCA
Norbert IMLIG, Tsunemichi SHIOZAWA, Ryusuke KONISHI, Kiyoshi OGURI, Kouichi NAGAMI, Hideyuki ITO, Minoru INAMORI, Hiroshi NAKADA, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2417-2425
Special SectionPAPER  VLSI Architecture
Dynamic Fast Issue (DFI) Mechanism for Dynamic Scheduled Processors
Abderazek BEN ABDALLAH, Mudar SAREM, Masahiro SOWA, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2426-2430
Special SectionPAPER  VLSI Architecture
A New Algorithm for the Configuration of Fast Adder Trees
Alberto PALACIOS-PAWLOVSKY, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2431-2438
Special SectionPAPER  VLSI Design Methodology
A New Method for Constructing IP Level Power Model Based on Power Sensitivity
Heng-Liang HUANG, Jiing-Yuan LIN, Wen-Zen SHEN, Jing-Yang JOU, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2439-2445
Special SectionPAPER  VLSI Design Methodology
A Practical Method for System-Level Bus Architecture Validation
Kazuyoshi TAKEMURA, Masanobu MIZUNO, Akira MOTOHARA, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2446-2455
Special SectionPAPER  VLSI Design Methodology
A Specification Style of Four-Phase Handshaking Asynchronous Controllers and the Optimization of Its Return-to-Zero Phase
Rafael K. MORIZAWA, Takashi NANYA, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2456-2463
Special SectionPAPER  Co-design and High-level Synthesis
Thread Composition Method for Hardware Compiler Bach Maximizing Resource Sharing among Processes
Mizuki TAKAHASHI, Nagisa ISHIURA, Akihisa YAMADA, Takashi KAMBE, 
Summary | Full Text:PDF

Vol.E83-A No.12  pp.2464-2473
Special SectionPAPER  Co-design and High-level Synthesis
CAM Processor Synthesis Based on Behavioral Descriptions
Nozomu TOGAWA, Tatsuhiko WAKUI, Tatsuhiko YODEN, Makoto TERAJIMA, Masao YANAGISAWA, Tatsuo OHTSUKI, 
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Current List: 32461 - 32470
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