Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 2002/10/01
Vol. E85-D
No. 10 ;
pp. 1595-1604
Type of Manuscript:
Special Section PAPER (Special Issue on Test and Verification of VLSI)
Category: Verification Keyword: timed trace theory, trace structures, time Petri nets, formal verification, asynchronous circuits, |