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| Keyword : binary decision diagrams
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Synthesis of Multilevel Logic Circuits from Binary Decision Diagrams
Nagisa ISHIURA | Publication: IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/09/25
Vol. E76-D
No. 9 ;
pp. 1085-1092
Type of Manuscript:
Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: Logic Synthesis
Keyword:
logic synthesis, binary decision diagrams, combinational circuits, | | | Summary | Full Text:PDF | |
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Minimum-Width Method of Variable Ordering for Binary Decision Diagrams
Shin-ichi MINATO | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A
No. 3 ;
pp. 392-399
Type of Manuscript:
Special Section PAPER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems)
Category:
Keyword:
binary decision diagrams, boolean function, logic synthesis, variable ordering, | | | Summary | Full Text:PDF | |
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