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IEICE Trans

Keyword : special-purpose VLSI processor

A Three-Dimensional Instrumentation VLSI Processor Based on a Concurrent Memory-Access Scheme
Seunghwan LEE Masanori HARIYAMA Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/11/25
Vol. E80-C  No. 11 ; pp. 1491-1498
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
3-D instrumentation, epipolar constraint, block matching algorithm, special-purpose VLSI processor, memory interleaving, 
 Summary | Full Text:PDF
Unified Scheduling of High Performance Parallel VLSI Processors for Robotics
Bumchul KIM Michitaka KAMEYAMA Tatsuo HIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/06/25
Vol. E76-A  No. 6 ; pp. 904-910
Type of Manuscript:  Special Section PAPER (Special Section on Papers Selected from 1992 Joint Technical Conference on Circuits/Systems,Computers and Communications (JTC-CSCC'92))
Category: Parallel Processor Scheduling
Keyword: 
minimum-latency architecture, special-purpose VLSI processor, parallel processing, communication time, bus interconnection network, 
 Summary | Full Text:PDF