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| Keyword : power estimation
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Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs
Yuichi NAKAMURA Takeshi YOSHIMURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A
No. 12 ;
pp. 3458-3463
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification
Keyword:
SoC, power consumption, power estimation, toggle rate, | | | Summary | Full Text:PDF | |
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Power Analysis and Estimation for SOC Design: Techniques and Tools
Yun CAO Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/02/01
Vol. E87-A
No. 2 ;
pp. 410-416
Type of Manuscript:
REVIEW PAPER
Category: VLSI Design Technology and CAD
Keyword:
low power, SOC, power analysis, power estimation, | | | Summary | Full Text:PDF | |
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Embedded DRAM (eDRAM) Power-Energy Estimation Using Signal Swing-Based Analytical Model
Yong-Ha PARK Jeonghoon KOOK Hoi-Jun YOO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C
No. 8 ;
pp. 1664-1668
Type of Manuscript:
LETTER
Category: Integrated Electronics
Keyword:
eDRAM, power estimation, | | | Summary | Full Text:PDF | |
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Experimental Analysis of Power Estimation Models of CMOS VLSI Circuits
Tohru ISHIHARA Hiroto YASUURA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A
No. 3 ;
pp. 480-486
Type of Manuscript:
Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
Category:
Keyword:
CMOS VLSI circuits, low power design, power estimation, | | | Summary | Full Text:PDF | |
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