Keyword : power estimation


Three Dimensional FPGA Architecture with Fewer TSVs
Motoki AMAGASAKI Masato IKEBE Qian ZHAO Masahiro IIDA Toshinori SUEYOSHI 
Publication:   
Publication Date: 2018/02/01
Vol. E101-D  No. 2 ; pp. 278-287
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Device and Architecture
Keyword: 
three dimensional IC3D-FPGApower estimationface-down/face-up stacking
 Summary | Full Text:PDF

A Fast Power Estimation Method for Content Addressable Memory by Using SystemC Simulation Environment
Kun-Lin TSAI I-Jui TUNG Feipei LAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/08/01
Vol. E96-A  No. 8 ; pp. 1723-1729
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
content addressable memorySystemCpower estimationsimulation
 Summary | Full Text:PDF

Performance and Power Modeling of On-Chip Bus System for a Complex SoC
Hyun LEE Je-Hoon LEE Kyoung-Rok CHO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/10/01
Vol. E93-C  No. 10 ; pp. 1525-1535
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
on-chip networkperformance modelingpower estimationarchitecture level modelingsystem-on-chip
 Summary | Full Text:PDF

Operation Mode Based High-Level Switching Activity Analysis for Power Estimation of Digital Circuits
Hyunchul SHIN Changhee LEE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2007/07/01
Vol. E90-B  No. 7 ; pp. 1826-1834
Type of Manuscript:  PAPER
Category: Energy in Electronics Communications
Keyword: 
low-power designcontrol signalpower estimationswitching activity
 Summary | Full Text:PDF

Hierarchical-Analysis-Based Fast Chip-Scale Power Estimation Method for Large and Complex LSIs
Yuichi NAKAMURA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/12/01
Vol. E89-A  No. 12 ; pp. 3458-3463
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Simulation and Verification
Keyword: 
SoCpower consumptionpower estimationtoggle rate
 Summary | Full Text:PDF

Efficient Vector Compaction Methods for Power Estimation with Consecutive Sampling Techniques
Chih-Yang HSU Chien-Nan Jimmy LIU Jing-Yang JOU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/11/01
Vol. E87-A  No. 11 ; pp. 2973-2982
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
power estimationvector compactiongroupingconsecutive samplingrandom sampling
 Summary | Full Text:PDF

Instruction-Level Power Estimation Method by Considering Hamming Distance of Registers
Akihiko HIGUCHI Kazutoshi KOBAYASHI Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/04/01
Vol. E87-A  No. 4 ; pp. 823-829
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 16th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
embedded processorpower estimationinstruction-level
 Summary | Full Text:PDF

Power Analysis and Estimation for SOC Design: Techniques and Tools
Yun CAO Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/02/01
Vol. E87-A  No. 2 ; pp. 410-416
Type of Manuscript:  REVIEW PAPER
Category: VLSI Design Technology and CAD
Keyword: 
low powerSOCpower analysispower estimation
 Summary | Full Text:PDF

Embedded DRAM (eDRAM) Power-Energy Estimation Using Signal Swing-Based Analytical Model
Yong-Ha PARK Jeonghoon KOOK Hoi-Jun YOO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/08/01
Vol. E85-C  No. 8 ; pp. 1664-1668
Type of Manuscript:  LETTER
Category: Integrated Electronics
Keyword: 
eDRAMpower estimation
 Summary | Full Text:PDF

A Low-Complexity and High-Resolution Algorithm for the Magnitude Approximation of Complex Numbers
Luca FANUCCI Massimo ROVINI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/07/01
Vol. E85-A  No. 7 ; pp. 1766-1769
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
complex numbermagnitude approximationpower estimationhardware implementationVLSI
 Summary | Full Text:PDF

High-Level Area/Delay/Power Estimation for Low Power System VLSIs with Gated Clocks
Shinichi NODA Nozomu TOGAWA Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2002/04/01
Vol. E85-A  No. 4 ; pp. 827-834
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 14th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
high-level synthesispower estimationgated clockswitching activitysequential circuit
 Summary | Full Text:PDF

A Power and Delay Optimization Method Using Input Reordering in Cell-Based CMOS Circuits
Masanori HASHIMOTO Hidetoshi ONODERA Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/01/25
Vol. E82-A  No. 1 ; pp. 159-166
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
input reorderingtransistor reorderingpower estimation
 Summary | Full Text:PDF

Pattern-Based Maximal Power Estimation for VLSI Chip Design
Wang-Jin CHEN Wu-Shiung FENG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/11/25
Vol. E80-A  No. 11 ; pp. 2300-2307
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
maximal power dissipationsimulated annealingwalk throughpower estimationpower optimization
 Summary | Full Text:PDF

Vector Compaction Using Dynamic Markov Models
Radu MARCULESCU Diana MARCULESCU Massoud PEDRAM 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/10/25
Vol. E80-A  No. 10 ; pp. 1924-1933
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
power estimationMarkov sourcesvector compactionDMC modeling
 Summary | Full Text:PDF

Experimental Analysis of Power Estimation Models of CMOS VLSI Circuits
Tohru ISHIHARA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/03/25
Vol. E80-A  No. 3 ; pp. 480-486
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 9th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
CMOS VLSI circuitslow power designpower estimation
 Summary | Full Text:PDF

Estimation of short-Circuit Power Dissipation for Static CMOS Gates
Akio HIRATA Hidetoshi ONODERA Keikichi TAMARU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/03/25
Vol. E79-A  No. 3 ; pp. 304-311
Type of Manuscript:  Special Section PAPER (Special Section of Selected Papers from the 8th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
short-circuit power dissipationshort-circit currentsimulation of power dissipationlow power disignpower estimation
 Summary | Full Text:PDF