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| Keyword : memory controller
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Soft-Error-Tolerant Dual-Modular-Redundancy Architecture with Repair and Retry Scheme for Memory-Control Circuit on FPGA
Makoto SAEN Tadanobu TOBA Yusuke KANNO | Publication: IEICE TRANSACTIONS on Electronics
Publication Date: 2017/04/01
Vol. E100-C
No. 4 ;
pp. 382-390
Type of Manuscript:
Special Section PAPER (Special Section on Solid-State Circuit Design — Architecture, Circuit, Device and Design Methodology)
Category:
Keyword:
FPGA, soft-error tolerance, memory controller, configuration RAM, | | | Summary | Full Text:PDF | |
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