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Low Power and Fault Tolerant Encoding Methods for On-Chip Data Transfer in Practical Applications Satoshi KOMATSU Masahiro FUJITA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A
No. 12 ;
pp. 3282-3289
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Low Power Methodology Keyword: bus encoding, ECC/EDC, low power, reliability, | | | Summary | Full Text:PDF | |
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Impacts of Compiler Optimizations on Address Bus Energy: An Empirical Study Hiroyuki TOMIYAMA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/10/01
Vol. E87-A
No. 10 ;
pp. 2815-2820
Type of Manuscript:
LETTER
Category: VLSI Design Technology and CAD Keyword: compiler optimization, embedded systems, low energy, bus encoding, | | | Summary | Full Text:PDF | |
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