Impacts of Compiler Optimizations on Address Bus Energy: An Empirical Study

Hiroyuki TOMIYAMA  

IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E87-A   No.10   pp.2815-2820
Publication Date: 2004/10/01
Online ISSN: 
Print ISSN: 0916-8508
Type of Manuscript: LETTER
Category: VLSI Design Technology and CAD
compiler optimization,  embedded systems,  low energy,  bus encoding,  

Full Text: PDF>>
Buy this Article

Energy consumption is one of the most critical constraints in the design of portable embedded systems. This paper describes an empirical study about the impacts of compiler optimizations on the energy consumption of the address bus between processor and instruction memory. Experiments using a number of real-world applications are presented, and the results show that transitions on the instruction address bus can be significantly reduced (by 85% on the average) by the compiler optimizations together with bus encoding.