Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2011/07/01 Vol. E94-DNo. 7 ;
pp. 1398-1408 Type of Manuscript: PAPER Category: Computer System Keyword: low power, instruction cache, instruction fetch mechanism,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/07/01 Vol. E91-ANo. 7 ;
pp. 1772-1779 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: instruction cache, soft error, drowsy technique, low-power,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/06/01 Vol. E84-ANo. 6 ;
pp. 1442-1453 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2000 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2000)) Category: Keyword: instruction cache, instruction fetch, analytical model, superscalar processor,