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| Keyword : hardware implementation
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Low Complexity Keypoint Extraction Based on SIFT Descriptor and Its Hardware Implementation for Full-HD 60 fps Video
Takahiro SUZUKI Takeshi IKENAGA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/06/01
Vol. E96-A
No. 6 ;
pp. 1376-1383
Type of Manuscript:
Special Section PAPER (Special Section on Circuit, System, and Computer Technologies)
Category:
Keyword:
keypoint extraction, SIFT, hardware implementation, FPGA, parallelizing, | | | Summary | Full Text:PDF | |
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Proposal and Hardware Performance of an Enhanced Feature Detection Method for OFDM Signals of Digital TV Standards
Chunyi SONG Hiroshi HARADA | Publication: IEICE TRANSACTIONS on Communications
Publication Date: 2013/03/01
Vol. E96-B
No. 3 ;
pp. 859-868
Type of Manuscript:
PAPER
Category: Terrestrial Wireless Communication/Broadcasting Technologies
Keyword:
DTV sensing, pilots, low SNR, hardware implementation, | | | Summary | Full Text:PDF | |
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FPGA Design of Real-Time Watermarking Processor for 2DDWT-Based Video Compression
Young-Ho SEO Dong-Wook KIM | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/06/01
Vol. E87-A
No. 6 ;
pp. 1297-1304
Type of Manuscript:
Special Section PAPER (Special Section on Papers Selected from 2003 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2003))
Category:
Keyword:
image watermarking, DWT, FPGA, hardware implementation, co-operation with compressor, | | | Summary | Full Text:PDF | |
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