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FOREWORD
Yukihide KOHIRA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2021/11/01
Vol. E104-A
No. 11
pp. 1450-1450
Type of Manuscript:
FOREWORD
Category:
Keyword:
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A Tuning Method of Programmable Delay Element with an Ordered Finite Set of Delays for Yield Improvement
Hayato MASHIKO Yukihide KOHIRA | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A
No. 12
pp. 2443-2450
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword:
delay variation, timing violation, yield, programmable delay element, | | | Summary | Full Text:PDF | |
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CAFE Router: A Fast Connectivity Aware Multiple Nets Routing Algorithm for Routing Grid with Obstacles
Yukihide KOHIRA Atsushi TAKAHASHI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A
No. 12
pp. 2380-2388
Type of Manuscript:
Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Level Design
Keyword:
PCB routing, length-matching routing, trunk routing, | | | Summary | Full Text:PDF | |
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Minimization of Delay Insertion in Clock Period Improvement in General-Synchronous Framework
Yukihide KOHIRA Shuhei TANI Atsushi TAKAHASHI | Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A
No. 4
pp. 1106-1114
Type of Manuscript:
Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category:
Keyword:
delay insertion, clock scheduling, general-synchronous framework, | | | Summary | Full Text:PDF | |
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