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IEICE Trans

Shozo HIRANO

Power-Supply Noise Reduction with Design for Manufacturability
Hiroyuki TSUJIKAWA Kenji SHIMAZAKI Shozo HIRANO Kazuhiro SATO Masanori HIROFUJI Junichi SHIMADA Mitsumi ITO Kiyohito MUKAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12  pp. 3421-3428
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Power/Ground Network
Keyword: 
power integrity, decoupling capacitor, power-supply noise, design for manufacturability (DFM), chemical mechanical polishing (CMP), 
 Summary | Full Text:PDF
Dynamic Power-Supply and Well Noise Measurements and Analysis for Low Power Body Biased Circuits
Kenji SHIMAZAKI Makoto NAGATA Takeshi OKUMOTO Shozo HIRANO Hiroyuki TSUJIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4  pp. 589-596
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
substrate noise, power-supply noise, ground noise, noise detector, dynamic IR drop, 
 Summary | Full Text:PDF
A Design Methodology for Low EMI Noise LSI with Fast and Accurate Estimation
Hiroyuki TSUJIKAWA Shozo HIRANO Kenji SHIMAZAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 2974-2982
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Parasitics and Noise
Keyword: 
EMI, noise, simulation, decoupling, capacitor, CMOS, 
 Summary | Full Text:PDF