Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2017/09/01 Vol. E100-DNo. 9pp. 2224-2227 Type of Manuscript: LETTER Category: Dependable Computing Keyword: fault diagnosis, bridging faults, clock lines,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2013/06/01 Vol. E96-DNo. 6pp. 1323-1331 Type of Manuscript: PAPER Category: Dependable Computing Keyword: test generation, fault simulation, clock line, delay fault,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2009/12/01 Vol. E92-ANo. 12pp. 3128-3135 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verfication Keyword: test generation, transistor defects, stuck-at tests, defect coverage,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/12/01 Vol. E91-ANo. 12pp. 3506-3513 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Logic Synthesis, Test and Verification Keyword: fault simulation, test generation, stuck-open faults, stuck-at tests, defect coverage,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2008/03/01 Vol. E91-DNo. 3pp. 690-699 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSIs) Category: Defect-Based Testing Keyword: transistor short, fault simulation, test generation, stuck-at test tool,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2006/11/01 Vol. E89-DNo. 11pp. 2748-2755 Type of Manuscript: PAPER Category: Dependable Computing Keyword: test generation, don't care value, sequential circuit, stuck-at fault,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2004/03/01 Vol. E87-DNo. 3pp. 530-536 Type of Manuscript: Special Section PAPER (Special Section on Test and Verification of VLSI) Category: Test Generation and Compaction Keyword: LSI testing, sequential circuit, test generation, low power dissipation, stuck-at fault,