Keyword : clock lines


A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line
Yoshinobu HIGAMI Senling WANG Hiroshi TAKAHASHI Shin-ya KOBAYASHI Kewal K. SALUJA 
Publication:   
Publication Date: 2017/09/01
Vol. E100-D  No. 9 ; pp. 2224-2227
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
fault diagnosisbridging faultsclock lines
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