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IEICE Trans

Senling WANG

Testing and Delay-Monitoring for the High Reliability of Memory-Based Programmable Logic Device
Xihong ZHOU Senling WANG Yoshinobu HIGAMI Hiroshi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2024/01/01
Vol. E107-D  No. 1  pp. 60-71
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
reconfigurable device, reliability, interconnect defects, aging, 
 Summary | Full Text:PDF
FF-Control Point Insertion (FF-CPI) to Overcome the Degradation of Fault Detection under Multi-Cycle Test for POST
Hanan T. Al-AWADHI Tomoki AONO Senling WANG Yoshinobu HIGAMI Hiroshi TAKAHASHI Hiroyuki IWATA Yoichi MAEDA Jun MATSUSHIMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2020/11/01
Vol. E103-D  No. 11  pp. 2289-2301
Type of Manuscript:  PAPER
Category: Dependable Computing
Keyword: 
POST, BIST, Multi-Cycle Test, Fault detection degradation, FF-Control Point Insertion technique, FF selection, 
 Summary | Full Text:PDF
A Method for Diagnosing Bridging Fault between a Gate Signal Line and a Clock Line
Yoshinobu HIGAMI Senling WANG Hiroshi TAKAHASHI Shin-ya KOBAYASHI Kewal K. SALUJA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2017/09/01
Vol. E100-D  No. 9  pp. 2224-2227
Type of Manuscript:  LETTER
Category: Dependable Computing
Keyword: 
fault diagnosis, bridging faults, clock lines, 
 Summary | Full Text:PDF
Scan-Out Power Reduction for Logic BIST
Senling WANG Yasuo SATO Seiji KAJIHARA Kohei MIYASE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/09/01
Vol. E96-D  No. 9  pp. 2012-2020
Type of Manuscript:  Special Section PAPER (Special Section on Dependable Computing)
Category: 
Keyword: 
low power, BIST, multi-cycle test, shift power, 
 Summary | Full Text:PDF