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IEICE Trans

Hideki ISHIDA

Circuits for CMOS High-Speed I/O in Sub-100 nm Technologies
Hirotaka TAMURA Masaya KIBUNE Hisakatsu YAMAGUCHI Kouichi KANDA Kohtaroh GOTOH Hideki ISHIDA Junji OGAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 300-313
Type of Manuscript:  INVITED PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: 
Keyword: 
CMOS, high-speed I/O, interface, sub-100 nm, 
 Summary | Full Text:PDF