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Vol.E75-B No.11
pp.1186-1191
Special SectionPAPER
Planar Inductor for Very Small DC-DC Converters
Toshiro SATO, Michio HASEGAWA, Tetsuhiko MIZOGUCHI, Masashi SAHASHI, |
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Vol.E75-B No.11
pp.1192-1198
Special SectionPAPER
AC Resistivity and Power Loss of Mn-Zn Ferrites
Seiichi YAMADA, Etsuo OTSUKI, Tsutomu OTSUKA, |
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Vol.E75-B No.11
pp.1199-1207
PAPER
Communication Networks and Service
Rete-Based Congestion Control in High Speed Packet-Switching Networks
Hiroshi INAI, Yuji KAMICHIKA, Masayuki MURATA, Hideo MIYAHARA, |
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Vol.E75-B No.11
pp.1208-1219
PAPER
Switching and Communication Processing
Recursive Copy Networks for Large Multicast ATM Switches
Shigeru SHIMAMOTO, Wen De ZHONG, Yoshikuni ONOZATO, Jaidev KANIYIL, |
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Vol.E75-B No.11
pp.1220-1226
PAPER
Radio Communication
Analysis of Topographic Effects on SIR-B Imagery: Correlation of Image Intensity with Local Incidence Angles
Makoto SATAKE, Masaharu FUJITA, Nobuyoshi FUGONO, |
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Vol.E75-C No.11
pp.1303-1303
FOREWORD
FOREWORD
Keikichi TAMARU, |
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Vol.E75-C No.11
pp.1304-1312
INVITED PAPER
ULSI Technology Trends toward 256K/1G DRAMs
Masahiro KASHIWAGI, |
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Vol.E75-C No.11
pp.1313-1322
Special SectionPAPER
Recessed Memory Array Technology for a Double Cylindrical Stacked Capacitor Cell of 256M DRAM
Kazuhiko SAGARA, Tokuo KURE, Shoji SHUKURI, Jiro YAGAMI, Norio HASEGAWA, Hidekazu GOTO, Hisaomi YAMASHITA, |
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Vol.E75-C No.11
pp.1323-1332
Special SectionPAPER
A ST (Stretchable Memory Matrix) DRAM with Multi-Valued Addressing Scheme
Tsukasa OOISHI, Mikio ASAKURA, Hideto HIDAKA, Kazutami ARIMOTO, Kazuyasu FUJISHIMA, |
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Vol.E75-C No.11
pp.1333-1343
Special SectionPAPER
Stabilization of Voltage Limiter Circuit for High-Density DRAM's Using Pole-Zero Compensation
Hitoshi TANAKA, Masakazu AOKI, Jun ETOH, Masashi HORIGUCHI, Kiyoo ITOH, Kazuhiko KAJIGAYA, Tetsurou MATSUMOTO, |
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