|
Vol.E76-A No.10
pp.1607-1609
Special SectionLETTER
On a Sufficient Condition for a Matrix to be the Synchronic Distance Matrix of a Marked Graph
Kiyoshi MIKAMI, Hiroshi TAMURA, Masakazu SENGOKU, Yoshio YAMAGUCHI, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1610-1614
Special SectionLETTER
A Study on the Design and Reliability Analysis of Concurrent System by Petri Nets: A Case on Lift System
Gy Bum KIM, Gang Soo LEE, Jung Mo YOON, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1615-1616
FOREWORD
FOREWORD
Winfried HAHN, Takeshi YOSHIMURA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1617-1625
Special SectionPAPER
High-Level Synthesis Using Given Datapath Information
Toshiaki MIYAZAKI, Mitsuo IKEDA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1626-1635
Special SectionPAPER
The lmprovement in Performance-Driven Analog LSI Layout System LIBRA
Tomohiko OHTSUKA, Nobuyuki KUROSAWA, Hiroaki KUNIEDA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1636-1644
Special SectionPAPER
An Optimal Channel Pin Assignment Algorithm for Hierarchical Building-Block Layout Design
Tetsushi KOIDE, Shin'ichi WAKABAYASHI, Noriyoshi YOSHIDA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1645-1651
Special SectionPAPER
An Efficient Algorithm for Multiple Folded Gate Matrix Layout
Shoichiro YAMADA, Shunichi NAKAYAMA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1652-1658
Special SectionPAPER
MINT--An Exact Algorithm for Finding Minimum Test Set--
Yusuke MATSUNAGA, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1659-1665
Special SectionPAPER
Hierarchical Analysis System for VLSI Power Supply Network
Takeshi YOSHITOME, |
|
Summary | Full Text:PDF | |
|
Vol.E76-A No.10
pp.1666-1675
Special SectionPAPER
A Proposal of High Speed and Low Power Data Transmission Method for VLSIs by Reduced-Swing Signal
Makoto IKEDA, Kunihiro ASADA, |
|
Summary | Full Text:PDF | |
|
Current List: 40001 - 40010
|